1. Field of the Invention
This invention relates to a semiconductor integrated circuit, and particularly to shapes of input/output unit cells and a layout of a semiconductor integrated circuit equipped with the input/output unit cells.
2. Description of the Related Art
With recent high integration or improvements in performance of a semiconductor device, an increase in the number of pins and an increase in the number of input/output unit cells incident to its increase cannot be avoided. On the other hand, since the needs of users are to reduce a semiconductor chip in size and thickness, various developments in a semiconductor integrated circuit wherein input/output unit cells are turned into narrow pad-based pitches, have been pursued.
In the aforementioned conventional semiconductor integrated circuit, however, the input/output unit cells can be reduced in width owing to the turning thereof into the narrow pad-based pitches, whereas they increase in vertical height, thus resulting in the fact that a core area would be reduced in size as compared or by contrast with the same chip size and needless corner area portions would be greatly enlarged. In other words, this will bring about the result that the implementation of the turning of the input/output unit cells into the narrow pad-based pitches does not directly lead to an increase in the number of pins.